Introduction to FPGA Part 5 - Finite State Machines | Digi-Key Electronics HD

A field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized digital logic for things like digital signal processing (DSP), machine learning, and cryptocurrency mining. Because of the FPGA’s flexibility, you can often implement entire processors using its digital logic. You can find FPGAs in consumer electronics, satellites, and in servers used to perform specialized calculations. In this series, we will see how an FPGA works and demonstrate how to create custom digital logic using the Verilog hardware description language (HDL). Previously, we demonstrated procedural assignments and how to feed a clock signal to such statements (https://youtu.be/LwQsyeuf9Sk). In this episode, we show how to create finite state machines (FSMs) in Verilog. The solution to the challenge at the end of the episode can be found here: https://www.digikey.com/en/maker/projects/introduction-to-fpga-part-5-finite-state-machine-fsm/4d83e63da76044af9acc8aa7dcf07c22 All code examples and solutions for this series can be found here: https://github.com/ShawnHymel/introduction-to-fpga A finite state machine (FSM or sometimes just “state machine”) is a mathematical model used to express how something (e.g. an abstract “machine”) can move sequentially through a series of states to tackle various problems. FSMs are used often in software, and we can create FSMs in hardware logic circuits. While many problems can be tackled without the use of an FSM, they provide a wonderful way to organize code (whether that’s hardware or software). A machine (or process) takes on certain properties when in a particular state, which often includes changing some kind of output. Such output might be toggling a bit, incrementing a counter, or opening a network connection. The machine moves to another state when certain criteria are met (known as the “inputs”). For example, a button might be pressed, a timer might expire, or a client might close the network connection, which will cause the state machine to move to a different state. State machines are often depicted in diagram form as a series of connected circles or rectangles. The arrows show how the machine moves between states and list the input criteria required for the transition. A Moore state machine has its outputs associated with each state. As a result, a Moore FSM must change states in order to change its outputs. A Mealy state machine, on the other hand, associates its outputs with states and inputs. This means the outputs in a Mealy state machine may change on the transition. While a Mealy state machine may be harder to understand at times, they often have fewer states than the equivalent Moore FSM (thus saving you precious logic cells or code space). Your challenge is to create a state machine that debounces a button to fix the counter from the previous episode. Instead of skipping counts on some button presses, the counter shou