ARDUINO 2.4 TFT from mcufriend with 0x4532 (LGDP4532) working now HD

03.11.2016
2.4 TFT with 0x4532 (LGDP4532) working now (see https://www.youtube.com/watch?v=Gvugrhv68zY for pictures of shield/board) -------------------------------------------- EDIT 6 Nov 2016: it is now included in the mcufriend library by David.--END EDIT 6 Nov 2016 --------------------------------------- Earlier solution: Based on the mcufriend libray and some other info I have this little 2.4 TFT with 0x4532 (LGDP4532) working now. Find the mcufriend library.( https://github.com/prenticedavid/MCUFRIEND_kbv) Follow the approach mentioned by David somewhere and add #define SUPPORT_4532 in the mcufriend_kbv.cpp file. Also in the mcufriend_kbv.cpp file add the following code: #ifdef SUPPORT_4532 //Support for LG Electronics LGDP4532 (also 4531 i guess) by Leodino v1.0 2-Nov-2016 //based on data by waveshare and the datasheet of LG Electronics //My approach to get it working: the parameters by waveshare did no make it function allright //I started with remming lines to see if this helped. Basically the stuff in range 41-93 //gives problems. //The other lines that are REMmed give no problems, but it seems default values are OK as well. case 0x4532: _lcd_capable = 0 | REV_SCREEN; // | INVERT_GS; static const uint16_t LGDP4532_regValues[] PROGMEM = { 0x0000,0x0001, //Device code read 0x0010,0x0628, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP 0x0012,0x0006, //Power control 3 PON VRH[3:0] //0x0013,0x0A32, //Power control 4 VCOMG VDV[4:0] VCM[6:0] 0x0011,0x0040, //Power control 2; DC1[2:0] DC0[2:0] VC[2:0] //0x0015,0x0050, //Regulator control RSET RI[2:0] RV[2:0] RCONT[2:0] 0x0012,0x0016, //Power control 3 PON VRH[3:0] TFTLCD_DELAY,50, 0x0010,0x5660, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP TFTLCD_DELAY,50, //0x0013,0x2A4E, //Power control 4 VCOMG VDV[4:0] VCM[6:0] //0x0001,0x0100, //Driver output control SM SS //0x0002,0x0300, //LCD Driving Wave Control //0x0003,0x1030, //Entry mode TRI DFM BGR ORG I/D[1:0] AM //0x0007,0x0202, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0] TFTLCD_DELAY,50, //0x0008,0x0202, //Display Control 2 FP[3:0] BP[3:0] front and back porch (blank period at begin and end..) //0x000A,0x0000, //Test Register 1 (RA0h) //Gamma adjustment 0x0030,0x0000, 0x0031,0x0402, 0x0032,0x0106, 0x0033,0x0700, 0x0034,0x0104, 0x0035,0x0301, 0x0036,0x0707, 0x0037,0x0305, 0x0038,0x0208, 0x0039,0x0F0B, TFTLCD_DELAY,50, //some of this stuff in range 41-93 really throws things off.... //0x0041,0x0002, //0x0060,0x2700, //Driver Output Control (R60h) //0x0061,0x0001, //Base Image Display Control (R61h) //0x0090,0x0119, //Panel Interface Control 1 (R90h) DIVI[1:0] RTNI[4:0] //0x0092,0x010A, //Panel Interface Control 2 (R92h) NOWI[2:0] EQI2[1:0] EQI1[1:0] //0x0093,0x0004, //Panel Interface Control 3 (R93h) MCPI[2:0] //0x00A0,0x0100, //Test Register 1 (RA0h) TFTLCD_DELAY,50, 0x0007,0x0133, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0

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